1. Field of the Invention
The present invention relates to an image memory data processing control apparatus, and more particularly to a novel-type image memory data processing control apparatus capable of achieving a high-speed image memory access by a linear interpolation operation unit(s) (hereinafter referred to as a DDA(s)), as well as a high-speed bit boundary block transfer operation (hereinafter referred to as a bitblt).
2. Description of the Relevant Art
In a graphic display apparatus of the raster scanning type, a multi-function performance has been required, in addition to the basic requirements of high-speed image display and decrease in cost of the entire system. In particular, the demand for a multi-window display is now prevailing.
There have been proposed the following two methods for achieving a multi-window display:
1) a so-called hardware method in which a control circuit is disposed for controlling a plurality of frame buffers in which image data for display previously divided into each window are stored, and according to display timing, the addresses of display data are successively switched so as to provide a display wherein overlaps of each image are taken into consideration, thereby to achieve a multi-window display; and PA0 2) a so-called bitblt method in which image data to be displayed in multi-windows held in memories, are read out one by one in bytes, the data thus read out undergo a raster operation and are then written into a frame buffer. Pixel data read out from the memory for each window area are transferred to the frame buffer with the transfer order set according to a multi-window display to be made, thereby to achieve a multi-window display. PA0 (i) data read out from the destination area; and PA0 (ii) data read out from the pixel data temporarily holding means and shifted to a direction at a right angle to the scanning line direction by the shift means.
According to the hardware method, the desired display may be obtained by merely mixing multi-window display screens. Memory transfer is therefore not required. Accordingly, a high-speed multi-window display may be made, regardless of the sizes of the display windows.
According to the bitblt method, a desired number of window displays may be made on the screen at arbitrary portions thereof. This remarkably enhances the degree of freedom of a multi-window display. In this method, the arrangement may be made such that the memories also serve as the frame buffer, and vice versa.
According to the hardware method, the number of windows on which a multi-window display is to be made is determined by the division number of the display screen. This presents the problem that the max. number of windows is determined by the system design. It is therefore not possible to increase the number of windows as desired on the spot. Further, even though a multi-window display with a few number of windows is to be actually made, there is still required a circuit arrangement for achieving a multi-window display with a predetermined division number of windows. This creates a problem of lowering the using efficiency of the hardware in its entirety.
Further, according to the circuit for displaying a mixed screen, the higher resolution display, the higher-speed device is required. This creates a problem of increasing the cost of the entire apparatus.
The bitblt method presents the problem that the composite screen display speed cannot be increased so much. That is, it is required in the bitblt method to transfer pixel data for an area to be window-displayed with the priority order taken into consideration. This increases the load of transferring data to the memories if the window areas are increased in size. Thus, the time required for completing the window composition is increased.
More specifically, when executing the bitblt processing in a bit map display apparatus, there is adopted a mode in which a plurality of pixel data continuous in the scanning line direction are accessed in one memory access. For example, as shown in FIG. 15, pixel data for two words are read out from the source area (See FIG. 15 (B)) and a shift processing is executed with the use of a barrel shifter (not shown) such that the processing start pixel position is set to the processing start pixel position at the destination area side (See FIG. 15 (C)). Then, a raster operation is executed, after which a mask processing is executed according to the processing start pixel position. Then, the data are written into the destination area, thus completing the bitblt processing.
In a bit map display apparatus, there are generally available three frame buffer access modes, i.e., a pixel mode, a plane mode and a fill-in mode.
In the pixel mode, provision is made such that access is made simultaneously to data for the same one pixel in the respective planes of the frame buffer.
In the plane mode, provision is made such that access is made simultaneously to data for a plurality of pixels in any one plane of the frame buffer.
In the fill-in mode, provision is made such that access is made based on color data previously set for pixels selected out of an area including a plurality of pixels of selected planes of the frame buffer.
In a three-dimensional graphic display apparatus, when displaying a figure which has undergone a shading processing, a three-dimensional hidden surface removal or the like, the pixel mode is, in principle, selected because the pixels generally have different color data or depth values (hereinafter referred to as z-values). Accordingly, only one-pixel data are drawn in every memory cycle. For example, when the frame buffer has a memory cycle of 400 nsec, the maximum pixel drawing speed is 2.5M pixels/second. With overhead taken into consideration, there may be drawn, in every second, about 50,000 arbitrary short vectors, each vector having 40 pixels, or about 5,000 polygons, each polygon being a regular square with its sides having 20 pixels being inclined at an arbitrary angle with respect to the scanning lines. Such drawing speed is not sufficiently high.
In view of the foregoing, a raster scanning graphic display apparatus uses a pixel buffer capable of temporarily holding data for a plurality of pixels, such that data for a plurality of pixels may be collectively written in one memory cycle.
To further speed up the processing, it becomes a common practice to provide a pair of such pixel buffers. It seems that such pixel buffer method may be approximated, to a certain extent, to the fill-in mode in a bit map display apparatus. In the fill-in mode, however, a fill-in color register (hereinafter referred to as a FCR) supplies a common value to all pixels within a word boundary. In the pixel buffer method, it is not possible to arrange for a common value to be supplied to all pixels within a word boundary by the FCR. Accordingly, both methods are considerably different from each other.
In the pixel buffer method, the number of data lines in the frame buffer memory is set to a value equal to the product of the number of planes and the number of bits of one word. Accordingly, the pixel buffer method is most fit to achieve the fill-in mode which merely requires that the same values be stored in all FCRs of the pixel buffer and that the pixels designated by the FCRs be overwritten only on pixels concerned, according to mask data. On the contrary, if it is intended to achieve a mode other than the fill-in mode, a considerable number of multiplexers or selectors should be added due to an increased number of data lines as above-mentioned (For example, 192 data lines are required for 16M colors and 8 bits/word). This disadvantageously complicates the entire arrangement. That is, as a data line selecting direction, different directions are used in the pixel mode and in the plane mode. To select both modes requires a considerable number of multiplexers or selectors.
As apparent from the foregoing, it is almost impossible to simultaneously achieve both functions, i.e., the bitblt function in a bit map display and a high-speed drawing function in a raster scanning three-dimensional graphic display. In an arrangement in which one function may be fully fulfilled, the other function cannot be satisfactorily achieved. Thus, a multi-function requirement cannot be fully satisfied.
In particular, when a polygon filling needs to be executed, it is required to generate a considerable number of pixel data. Accordingly, even though provision is made such that a linear interpolation operation is continuously made by a DDA unit without substantial interruption thereof, both the drawing function and the bitblt function cannot be achieved at a high speed as desired.